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文献资料中文题目：数字滤波器设计
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digital filter design
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digital filter design
Abstract：
With the information age and the advent of the digital world digital signal processing has become one of today's most important disciplines and door technology Digital signal processing in communications voice images automatic control radar military aerospace medical and household appliances and many other fields widely applied In the digital signal processing applications the digital filter is important and has been widely applied
Keyword：SCM Proteus C language Digital filter
1 figures Unit on
Analog and digital filters
In signal processing the function of a filter is to remove unwanted parts of the signal such as random noise or to extract useful parts of the signal such as the components lying within a certain frequency range
The following block diagram illustrates the basic idea
There are two main kinds of filter analog and digital They are quite different in their physical makeup and in how they work An analog filter uses analog electronic circuits made up from components such as resistors capacitors and op amps to produce the required filtering effect Such filter circuits are widely used in such applications as noise reduction video signal enhancement graphic equalisers in hifi systems and many other areas There are wellestablished standard techniques for designing an analog filter circuit for a given requirement At all stages the signal being filtered is an electrical voltage or current which is the direct analogue of the physical quantity (eg a sound or video signal or transducer output) involved A digital filter uses a digital processor to perform numerical calculations on sampled values of the signal The processor may be a generalpurpose computer such as a PC or a specialised DSP (Digital Signal Processor) chip The analog input signal must first be sampled and digitised using an ADC (analog to digital converter) The resulting binary numbers representing successive sampled values of the input signal are transferred to the processor which carries out numerical calculations on them These calculations typically involve multiplying the input values by constants and adding the products together If necessary the results of these calculations which now represent sampled values of the filtered signal are output through a DAC (digital to analog converter) to convert the signal back to analog form
Note that in a digital filter the signal is represented by a sequence of numbers rather than a voltage or current
The following diagram shows the basic setup of such a system
Unit refers to the input signals used to filter hardware or software If the filter input output signals are separated they are bound to respond to the impact of the Unit is separated such as digital filters filter definition Digital filter function which was to import sequences X transformation into export operations through a series Y
According to figures filter function 24hour live response characteristics digital filters can be divided into two namely unlimited long live long live the corresponding IIR filter and the limited response to FIR filters IIR filters have the advantage of the digital filter design can use simulation results and simulation filter design of a large number of tables may facilitate simple It is the shortcomings of the nonlinear phase Linear phase if required will use the entire network phasecorrection Image processing and transmission of data collection is required with linear phase filters identity And FIR linear phase digital filter to achieve but an arbitrary margin characteristics Impact from the digital filter response of the units can be divided into two broad categories the impact of the limited response (FIR) filters and unlimited number of shocks to (IIR) digital filters
FIR filters can be strictly linear phase but because the system FIR filter function extremity fixed at the original point it can only use the higher number of bands to achieve their high selectivity for the same filter design indicators FIR filter called band than a few highIIR 510 times the cost is higher Signal delay is also larger But if the same linear phase IIR filters must be networkwide calibration phase the same section also increase the number of filters and network complexity FIR filters can be used to achieve nonDigui way not in a limited precision of a shock and into the homes and quantitative factors of uncertainty arising from the impact of errors than IIR filter small number and FIR filter can be used FFT algorithms the computational speed But unlike IIR filter can filter through the simulation results there is no readymade formula FIR filter must use computeraided design software (such as MATLAB) to calculate So a broader application of FIR filters and IIR filters are not very strict requirements on occasions
Unit from subfunctions can be divided into the following four categories
(1) Lowfilter (LPF)
(2) highfilter (HPF)
(3) beltfilter (BPF)
(4) to prevent filter (BSF)
The following chart dotted line for the ideals of the filter frequency characteristics
2 MATLAB introduced
MATLAB is a matrix laboratory (Matrix Laboratory) is intended In addition to an excellent value calculation capability it also provides professional symbols terms word processing visualization modeling simulation and realtime control functions MATLAB as the world's top mathematical software applications with a strong engineering computing algorithms research engineering drawings applications development data analysis and dynamic simulation and other functions in aerospace mechanical manufacturing and construction fields playing an increasingly important role And the C language function rich the use of flexibility highefficiency goals procedures High language both advantages as well as low level language features Therefore C language is the most widely used programming language Although MATLAB is a complete fully functional programming environment but in some cases data and procedures with the external environment of the world is very necessary and useful Filter design using Matlab could be adjusted with the design requirements and filter characteristics of the parameters visual simple greatly reducing the workload for the filter design optimization
In the electricity system protection and secondary computer control many signal processing and analysis are based on are certain types Yeroskipou and the second harmonics of the system voltage and current signals (especially at D process) are mixed with a variety of complex components the filter has been installed power system during the critical components Current computer protection and the introduction of two digital signal processing software main filter Digital filter design using traditional cumbersome formula the need to change the parameters after recalculation especially in high filters filter design workload Uses MATLAB signal processing boxes can achieve rapid and effective digital filter design and simulatio
MATLAB is the basic unit of data matrix with its directives Biaodashi mathematics engineering commonly used form is very similar it is used to solve a problem than in MATLAB C Fortran and other languages End precision much the same thing The popular MATLAB 53Simulink30 including hundreds of internal function with the main pack and 30 types of tool kits (Toolbox) kits can be divided into functional tool kits and disciplines toolkit MATLAB tool kit used to expand the functional symbols terms visualization simulation modelling word processing and realtime control functions professional disciplines toolkit is a stronger tool kits tool kits control signal processing tool kit tool kits etc belonging to such communications
MATLAB users to open widely welcomed In addition to the internal function all the packages MATLAB tool kits are readable document and the document could be amended modified or users through Yuanchengxu the construction of new procedures to prepare themselves for kits
3 Digital filter design
Digital filter design of the basic requirements
Digital filter design must go through three steps
(1) Identification of indicators In the design of a filter there must be some indicators These indicators should be determined on the basis of the application In many practical applications digital filters are often used to achieve the frequency operation Therefore indicators in the form of general jurisdiction given frequency range and phase response Margins key indicators given in two ways The first is absolute indicators It provides a function to respond to the demands of the general application of FIR filter design The second indicator is the relative indicators Its value in the form of answers to decibels In engineering practice the most popular of such indicators For phase response indicators forms usually in the hope that the system with a linear phase frequency bands human Using linear phase filter design with the following response to the indicators strengths：①it only contains a few algorithms no plural operations②there is delay distortion only a fixed amount of delay ③the filter length N (number of bands for N1) the volume calculation for N2 magnitude
(2) Model approach Once identified indicators can use a previous study of the basic principles and relationships a filter model to be closer to the target system
(3) Achieved the results of the above two filters usually by differential equations system function or pulse response to describe According to this description of hardware or software used to achieve it
4 Introduced FPGA
Programmable logic device is a generic logic can use a variety of chips which is to achieve ASIC ASIC (Application Specific Integrated Circuit) semicustomized device Its emergence and development of electronic systems designers use CAD tools to design their own laboratory in the ASIC device Especially FPGA (Field Programmable Gate Array) generated and development as a microprocessor memory the figures for electronic system design and set a new industry standard (that is based on standard product sales catalogue in the market to buy) Is a digital system for microprocessors memories FPGA or three standard building blocks constitute their integration direction
Digital circuit design using FPGA devices can not only simplify the design process and can reduce the size and cost of the entire system increasing system reliability They do not need to spend the traditional sense a lot of time and effort required to create integrated circuits to avoid the investment risk and become the fastestgrowing industries of electronic devices group Digital circuit design system FPGA devices using the following main advantages
(1) Design flexible
Use FPGA devices may not in the standard series device logic functional limitations And changes in system design and the use of logic in any one stage of the process and only through the use of reprogramming the FPGA device can be completed the system design provides for great flexibility
(2) Increased functional density
Functional density in a given space refers to the number of functional integration logic Programmable logic chip components doors several high a FPGA can replace several films film scores or even hundreds of smallscale digital IC chip illustrated in the film FPGA devices using the chip to use digital systems in small numbers thus reducing the number of chips used to reduce the number of printed size and printed and will ultimately lead to a reduction in the overall size of the system
(3) Improve reliability
Printing plates and reduce the number of chips not only can reduce system size but it greatly enhanced system reliability A higher degree of integration than systems in many lowstandard integration components for the design of the same system with much higher reliability FPGA device used to reduce the number of chips required to achieve the system in the number printed on the cord and joints are reduced the reliability of the system can be mproved
(4) Shortening the design cycle
As FPGA devices and the programmable flexibility use it to design a system for longer than traditional methods greatly shortened FPGA device master degrees high use printed circuit layout wiring simple At the same time success in the prototype design the development of advanced tools a high degree of automation their logic is very simple changes quickly Therefore the use of FPGA devices can significantly shorten the design cycle system and speed up the pace of product into the market improving product competitiveness
(5) Work fast
FPGACPLD devices work fast generally can reach several original Hertz far larger than the DSP device At the same time the use of FPGA devices the system needed to achieve circuit classes and small and thus the pace of work of the entire system will be improved
(6) Increased system performance confidentiality
Many FPGA devices have encryption functions in the system widely used FPGA devices can effectively prevent illegal copying products were others
(7) To reduce costs
FPGA device used to achieve digital system design if only device itself into the price sometimes you would not know it advantages but there are many factors affecting the cost of the system taken together the cost advantages of using FPGA is obvious First the use of FPGA devices designed to facilitate change shorten design cycles reduce development costs for system development Secondly the size and FPGA devices allow automation needs plugins reducing the manufacturing system to lower costs Again the use of FPGA devices can enhance system reliability reduced maintenance workload thereby lowering the cost of maintenance services for the system In short the use of FPGA devices for system design to save costs
FPGA design principles
FPGA design an important guiding principles the balance and size and speed of exchange the principles behind the design of the filter expression of a large number of certification
Here area means a design exertion FPGACPLD logic resources of the FPGA can be used to the typical consumption (FF) and the search table (IUT) to measure more general measure can be used to design logic equivalence occupied by the door is measured pace means stability operations in the chip design can achieve the highest frequency the frequency of the time series design situation and design to meet the clock cycle PADto pad Clock Setup Time Clock Hold Beijing ClocktoOutput Delay and other characteristics of many time series closely related Area (area) and speed (speed) runs through the two targets FPGA design always is the ultimate design quality evaluation criteria On the size and speed of the two basic concepts balance of size and speed and size and speed of swap
One pair of size and speed is the unity of opposites contradictions body Requirements for the design of a design while the smallest highest frequency of operation is unrealistic More scientific goal should be to meet the design requirements of the design time series (includes requirements for the design frequency) premise the smallest chip area occupied Or in the specified area the design time series cushion greater frequency run higher This fully embodies the goals of both size and speed balanced thinking On the size and speed requirements should not be simply interpreted as raising the level and design engineers perfect sexual pursuit and should recognize that they are products and the quality and cost of direct relevance If time series cushion larger design running relatively high frequency that the design Jianzhuangxing stronger more quality assurance system as a whole On the other hand the smaller size of consumption design is meant to achieve in chip unit more functional modules the chip needs fewer the entire system has been significantly reduced cost As a contradiction of the two components the size and speed is not the same status In contrast meet the timetables and work is more important for some frequency when both con
flicts the use of priority guidelines
Area and the exchange rate is an important FPGA design ideas Theoretically if a design time series cushion larger can run much higher than the frequency design requirements then we can through the use of functional modules to reduce the consumption of the entire chip design area which is used for space savings advantages of speed Conversely if the design of a time series demanding less than ordinary methods of design frequency then generally flow through the string and data conversion parallel reproduction of operational module designed to take on the whole string and conversion and operate in the export module to chip in the data and string conversion from the macro point of view the whole chip meets the requirements of processing speed which is equivalent to the area of reproduction rate increase
For example Assuming that the digital signal processing system is 350Mbs input data flow rate and in FPGA design data processing modules for maximum processing speed of150Mbs because the data throughput processing module failed to meet requirements it is impossible to achieve directly in the FPGA Such circumstances they should use areavelocity thinking at least three processing modules from the first data sets will be imported and converted and then use these three modules parallel processing of data distribution then the results and string conversion we have complete data rate requirements We look at both ends of the processing modules data rate is 350Mbs and in view of the internal FPGA each submodule handles the data rate is 150Mbs in fact all the data throughput is dependent on three security modules parallel processing subsidiary completed that is used by more chip area achieve highspeed processing through the area of reproduction for processing speed enhancement and achieved design
FPGA is the English abbreviation Field of Programmable Gate Array for the site programmable gate array which is in Pal Gal Epld programmable device basis to further develop the product It is as ASIC (ASIC) in the field of a semicustomized circuit and the emergence of both a customized solution to the shortage circuit but overcome the original programmable devices doors circuit few limited shortcomings
FPGA logic module array adopted home (Logic Cell Array) a new concept of internal logic modules may include CLB (Configurable Logic Block) export import module IOB (Input Output Block) and internal links (Interconnect) 3 FPGA basic features are
(1) Using FPGA ASIC design ASIC using FPGA circuits the chip can be usedwhile users do not need to vote films production
(2) FPGA do other customized or semicustomized ASIC circuits throughout the Chinese specimen films
(3) FPGA internal capability and rich IO Yinjue
(4) FPGA is the ASIC design cycle the shortest circuit the lowest development costs risks among the smallest device
(5) FPGA using highspeed Chmos crafts low consumption with CMOS TTL lowpower compatible
It can be said that the FPGA chip is for smallscale systems to improve system integration reliability one of the best
Currently FPGA many varieties the Revenue software series TI companies TPC series the fiex ALTERA company series
FPGA is stored in films from the internal RAM procedures for the establishment of the state of its work therefore need to programmed the internal Ram Depending on the different configuration users can use a different programming methods
Plus electricity FPGA EPROM chips will be read into the film programming RAM中 data configuration is completed FPGA into working order Diaodian FPGA resume into white films the internal logic of relations disappear FPGA to repeated use FPGA's programming is dedicated FPGA programming tool using generic EPROM prom programming device can When the need to modify functional FPGA EPROM can only change is Thus with a FPGA different programming data to produce different circuit functions Therefore the use of FPGA very flexible
There are a variety of FPGA model the main model for a parallel FPGA plus a EPROM manner From the model can support a number of films FPGA serial prom programming model could be used serial prom FPGA programming FPGA The external model can be engineered as microprocessors from its programming microprocessors
Verilog HDL is a hardware description language for the algorithm level doors at the level of abstract level to switchlevel digital system design modelling Modelling of the target figure by the complexity of the system can be something simple doors and integrity of electronic digital systems Digital system to the levels described and in the same manner described in Hintime series modelling
Verilog HDL language with the following description of capacity design behaviour characteristics design data flow characteristics composition and structure designed to control and contain the transmission and waveform design a certification mechanism All this with the use of a modelling language In addition Verilog HDL language programming language interface provided by the interface in simulation design certification from the external design of the visit including specific simulation control and operation
Verilog HDL language grammar is not only a definition but the definition of each grammar structure are clear simulation simulation exercises Therefore the use of such language to use Verilog simulation models prepared by a certification From the C programming language the language inherited multiple operating sites and structures Verilog HDL provides modelling capacity expansion many of the initial expansion would be difficult to understand However the core subsets of Verilog HDL language very easy to learn and use which is sufficient for most modelling applications Of course the integrity of the hardware description language is the most complex chips from the integrity of the electronic systems described
History
Verilog HDL language initially in 1983 by Gateway Design Automation companies for product development simulator hardware modelling language Then it is only a dedicated language Since their simulation simulation devices widely used products Verilog HDL as a userfriendly and practical language for many designers gradually accepted In an effort to inc
rease the popularity of the language activities Verilog HDL language in 1990 was a public area Open Verilog International (OVI) is to promote the development of Verilog international organizations 1992 decided to promote OVI OVI standards as IEEE Verilog standards The effort will ultimately succeed a IEEE
1995 Verilog language standard known as IEEE Std 13641995 Integrity standards in Verilog hardware description language reference manual contains a detailed description
Main capacity
Listed below are the main Verilog hardware description language ability
*Basic logic gate and for example or have embedded in the language and nand
* Users of the original definition of the term (UDP) the flexibility Users can be defined in the original language combinations logic original language the original language of logic could also be time series
* Switches class infrastructure models such as the nmos and pmos also be embedded in the language
* Hinlanguage structure designated for the cost of printing the design and trails Shi Shi and design time series checks
* Available three different ways to design or mixed mode modelling These methods include acts described ways use process of structural modelling Data flow approach use of a modelling approach Fuzhi expression Structured way using examples of words to describe modular doors and modelling
* Verilog HDL has two types of data data types and sequence data line network types Line network types that the physical links between components and sequence types that abstract data storage components
* To describe the level design the structure can be used to describe any level module example
* Design size can be arbitrary Language is design size (size) impose any restrictions
* And the machine can read Verilog language it may as EDA tools and languages of the world between the designers
* Verilog HDL language to describe capacity through the use of programming language interface (PLI) mechanism further expansion PLI is to allow external functions of the visit Verilog module information allowing designers and simulator world Licheng assembly
* Design to be described at a number of levels from the switch level doors level register transfer level (RTL) to the algorithm level including the level of process and content
* To use embedded switching level of the original language in class switch design integrity modelling * Same language can be used to generate simulated incentive and certification by the designated testing conditions such as the value of imports of the designated
*Verilog HDL simulation to monitor the implementation of certification the certification process of implementing the simulation can be designed to monitor and demonstrate value These values can be used to compare with the expectations that are not matched in the case of print news reports
* Acts described in the class not only in the RTL level Verilog HDL design description and to describe their level architecture design algorithm level behavioural description
* Examples can use doors and modular structure of language in a class structure described
* Verilog HDL mixed mode modelling capabilities in the design of a different design in each module can level modelling
* Verilog HDL has builtin logic function such as
*Structure of highlevel programming languages such as conditions of expression and the cycle of expression language language can be used
* To it and can display regular modelling * Provide a powerful document literacy
* Language in the specific circumstances of noncertainty that in the simulator different models can produce different results For example describing events in the standard sequence of events is not defined
5 In troduction of DSP
Today DSP is w idely used in the modern techno logy and it has been the key part of many p roducts and p layed more and mo re impo rtant ro le in our daily lifeRecent ly Northw estern Po lytechnica lUniversity Aviation Microelect ronic Center has comp leted the design of digital signal signal p rocesso r co re NDSP25 w h ich is aim ing at TM S320C25 digital signal p rocesso r of Texas Inst rument TM S320 series By using top 2dow n design flow NDSP25 is compat ible w ith inst ruct ion and interface t im ing of TM S320C25
Digital signal processors (DSP) is a fit for realtime digital signal processing for highspeed dedicated processors the main variety used for realtime digital signal processing to achieve rapid algorithms In today's digital age background the DSP has become the communications computer and consumer electronics products and other fields based device
Digital signal processors and digital signal processing is inseparably we usually say DSP can also mean the digital signal processing (Digital Signal Processing) is that in this digital signal processors Lane Digital signal processing is a cover many disciplines applied to many areas and disciplines refers to the use of computers or specialized processing equipment the signals in digital form for the collection conversion recovery valuation enhancement compression identification processing the signals are compliant form Digital signal processors for digital signal processing devices it is accompanied by a digital signal processing to produce DSP development process is broadly divided into three phases the 20th century to the 1970s theory that the 1980s and 1990s for the development of products Before the emergence of the digital signal processing in the DSP can only rely on microprocessors (MPU) to complete However the advantage of lower highspeed realtime processing can not meet the requirements Therefore until the 1970s a talent made based DSP theory and algorithms With LSI technology development in 1982 was the first recipient of the world gave birth to the DSP chip Years later the second generation based on CMOS工艺 DSP chips have emerged The late 1980s the advent of the third generation of DSP chips DSP is the fastestgrowing 1990s there have been four successive fivegeneration and the generation DS
P devices After 20 years of development the application of DSP products has been extended to people's learning work and all aspects of life and gradually become electronics products determinants
REFERENCES
1 Chan DSK Rabiner LR Analysis of Quantization Errors in the Direct Form for Finite Impulse Response Digital Filters IEEE Trans Audio and Electroacoustics 21(4) (1973) 354366
2 Avenhaus E On the Design of Digital Filters with Coefficients of Limited Word Length IEEE Trans Acoustics Speech Signal Processing 20 (1972) 206212
3 Kodek DM Design of Optimal Finite Wordlength FIR Digital Filters using Integer Programming Techniques IEEE Trans Acoustics Speech and Signal Processing 28(3) (1980) 304308
4 Kodek DM Steiglitz K Comparison of Optimal and Local Search Methods for Designing Finite Wordlength FIR digital filters IEEE Trans Circuits and Systems 28(1) (1981) 2832
5 Mitchell M An Introduction to Genetic Algorithms Bradford Books MA Cambridge
中文翻译：
数字滤波器设计
文摘着信息时代数字世界数字信号处理已成门极重学科技术领域数字信号处理通信语音图动控制雷达军事航空航天医疗家电器等众领域广泛应数字信号处理应中数字滤波器十分重已获广泛应
关键字单片机proteusC语言数字滤波
1数字滤波器介绍：
模拟数字滤波器
信号处理滤功排部分信息机噪音提取信号部分部分势定频率范围
方框图说明基思路：
两类型滤 模拟数字完全物理结构工作 类电子电路模拟滤部分组成例电阻电容opamps生产需滤效果种滤器广泛电路减少噪音等方面应提高视频信号图均衡高科技传真系统等众领域完善技术标准设计模拟电路进行滤特定求阶段信号电机电压滤目前直接物理模拟量(例声音视频信号变频器生产)处理数码滤数字进行数值计算处理器信号抽样值处理器通计算机等PC专业发展计划图(数字信号处理器)芯片模拟信号必须先投入取样数码艺术发展局(模拟数字转换器)二元占抽样连续输入信号价值转移处理器进行数字计算计算通常涉方面投入增加产品价值素必计算结果现抽样信号值滤产出通发展援助委员会(类数位转换器)信号转换回模拟形式
数字滤信号系列数字电压逆流
图表显示种制度基格局：
滤波器指输入信号进行滤波硬件软件果滤波器输入输出
离散信号该滤波器击响应必然离散样滤波器定义数字滤波器数字滤波器功输入序列X通定运算变换成输出序列Y
根数字滤波器激响应函数时域特性数字滤波器分两种限长激相应IIR滤波器限长激响应FIR滤波器IIR数字滤波器优点利模拟滤波器设计结果模拟滤波器设计量图表查方便简单缺点相位非线性需线性相位采全通网络进行相位校正图象处理数采集传输求滤波器具线性相位特性FIR数字滤波器实现线性相位具意幅度特性数字滤波器单位击响应分两类：限击响应（FIR）数字滤波器限击响应（IIR）数字滤波器
FIR滤波器严格线性相位然FIR滤波器系统函数极点固定原点较高阶数实现高选择性样滤波器设计指标FIR滤波器求阶数IIR高510倍成较高信号延迟较果求相线性相位IIR滤波器必须加全通网络进行相位校正样增加滤波器网络节数复杂性FIR滤波器非递方法实现限精度会产生振荡时量化舍入系数确定性引起误差影响IIR滤波器FIR滤波器采FFT算法运算速度快象IIR滤波器助模拟滤波器成果FIR滤波器没现成计算公式必须计算机辅助设计软件（MATLAB）计算知FIR滤波器应较广IIR滤波器相位求严格场合
滤波器功分分4类
(1) 低通滤波器(LPF)
(2) 高通滤波器(HPF )
(3) 带通滤波器(BPF )
(4) 带阻滤波器(BSF)
理想滤波器幅频特性图虚线：
2MATLAB介绍
MATLAB矩阵实验室Matrix Laboratory意具备卓越数值计算力外提供专业水符号计算文字处理视化建模仿真实时控制等功MATLAB作世界顶尖数学应软件强工程计算算法研究工程绘图应程序开发数分析动态仿真等功航空航天机械制造工程建筑等领域发挥着越越重作C语言功丰富灵活方便目标程序效率高高级语言优点低级语言特点C语言目前应广
编程语言然MATLAB完整功齐全编程环境某情况外部环境数程序交互非常必须益利MATLAB设计滤波器时设计求滤波器特性调整参数直观简便极减轻工作量利滤波器设计优化
电力系统微机保护二次控制中信号处理分析基正旋基波某整次谐波进行系统电压电流信号尤障瞬变程中混种复杂成分滤波器直电力系统二次装置关键部件目前微机保护二次信号处理软件采数字滤波器传统数字滤波器设计繁琐公式计算改变参数需重新计算设计滤波器尤高阶滤波器时工作量利MATLAB信号处理箱快速效实现数字滤波器设计仿真
MATLAB基数单位矩阵指令表达式数学工程中常形式十分相似MATLAB解算问题CFORTRAN等语言完相事情简捷前流行MATLAB 53Simulink30包括拥数百部函数包三十种工具包(Toolbox)工具包分功性工具包学科工具包功工具包扩充MATLAB符号计算视化建模仿真文字处理实时控制等功学科工具包专业性较强工具包控制工具包信号处理工具包通信工具包等属类
开放性MATLAB广受户欢迎部函数外MATLAB包文件种工具包读修改文件户通源程序修改加入编写程序构造新专工具包
3 数字滤波器设计
数字滤波器设计基求
数字滤波器设计三步骤：
（1） 确定指标设计滤波器前必须指标指标根应确定实际应中数字滤波器常常实现选频操作指标形式般频域中出幅度相位响应幅度指标两种方式出第种绝指标提供幅度响应函数求般应FIR滤波器设计第二种指标相指标分贝值形式出求工程实际中种指标受欢迎相位响应指标形式通常希系统通频带中线性相位运线性相位响应指标进行滤波器设计具优点：①包含实数算法涉复数运算②存延迟失真固定数量延迟③长度N滤波器阶数N1计算量N2数量级
（2） 模型逼旦确定指标利前面学基原理关系式提出滤波器模型逼定指标体系
（3） 实现面两步结果滤波器通常差分方程系统函数脉响应描述根描述硬件者计算机软件实现
4FPGA介绍
编程逻辑器件种构成种途逻辑通芯片实现专集成电路ASICApplication Specific Integrated Circuit半定制器件出现发展电子系统设计师助CAD手段实验室里设计ASIC器件特FPGA （Field Programmable Gate Array） 产生发展成继微处理器存储器电子数字系统设计确定种新工业标准(标准产品目录销售市场购)数字系统正微处理器存储器FPGA三种标准积木块构成集成方发展
FPGA器件设计数字电路仅简化设计程降低整系统体积成增加系统性需花费传统意义制造集成电路需量时间精力避免投资风险成电子器件行业中发展快族FPGA器件设计数字系统电路优点：
（1）设计灵活
FPGA器件受标准系列器件逻辑功限制修改逻辑系统设计程阶段中进行须通FPGA器件进行重新编程完成系统设计提供灵活性
（2） 增功密集度
功密集度指定空间集成逻辑功数量编程逻辑芯片组件门数高片FPGA代片十片百片中规模数字集成电路芯片FPGA器件实现数字系统时芯片数量少减少芯片数目减少印刷线路板面积印刷线路板数目终导致系统规模全面缩减
（3）提高性
减少芯片印刷板数目仅缩系统规模极提高系统性 具较高集成度系统许低集成度标准组件设计相系统具高性FPGA器件减少实现系统需芯片数目印刷线路板引线焊点数量减少系统性提高
（4）缩短设计周期
FPGA器件编程性灵活性设计系统需时间传统方法缩短FPGA器件集成度高时印刷线路板电路布局布线简单时样机设计成功开发工具先进动化程度高进行逻辑修改十分简便迅速FPGA器件缩短系统设计周期加快产品投放市场速度提高产品竞争力
（5） 工作速度快
FPGACPLD器件工作速度快般达百兆赫兹远远DSP器件时FPGA器件实现系统需电路级数少整系统工作速度会提高
（6） 增加系统保密性
FPGA器件具加密功系统中广泛FPGA器件效防止产品非法仿制
（7）降低成
FPGA器件实现数字系统设计时果仅器件身价格考虑时出优势影响系统成素方面综合考虑FPGA成优越性明显首先FPGA器件修改设计方便设计周期缩短系统研制开发费降低次FPGA器件印刷线路板面积需插件减少系统制造费降低次FPGA器件系统性提高维修工作量减少进系统维修服务费降低总FPGA器件进行系统设计节约成
FPGA设计原：
FPGA设计重指导原：面积速度衡互换原边滤波器设计中量验证体现
里面积指设计消耗FPGACPLD逻辑资源数量FPGA消耗触发器(FF)查找表(IUT)衡量更般衡量方式设计占等价逻辑门数衡量速度指设计芯片稳定运行够达高频率频率设计时序状况决定设计满足时钟周期PADto PAD Time Clock Setup Time Clock Hold Time ClocktoOutput Delay等众时序特征量密切相关面积(area)速度(speed)两指标贯穿着FPGA设计始终设计质量评价终极标准关面积速度两基概念
面积速度衡面积速度互换
面积速度立统矛盾体求设计时具备设计面积运行频率高现实更科学设计目标应该满足设计时序求(包含设计频率求)前提占芯片面积者规定面积设计时序余量更频率跑更高两种目标充分体现面积速度衡思想关面积速度求应该简单理解工程师水提高设计完美性追求应该认识产品质量成直接相关果设计时序余量较跑频率较高意味着设计健壮性更强整系统质量更保证方面设计消耗面积更意味着单位芯片实现功模块更需芯片数量更少整系统成幅度削减作矛盾两组成部分面积速度位样相满足时序工作频率求更重两者突时采速度优先准
面积速度互换 FPGA设计重思想理讲设计果时序余量较跑频率远远高设计求通功模块复减少整设计消耗芯片面积速度优势换面积节约反果设计时序求高普通方法达设计频率般通数流串转换行复制操作模块整设计采取串转换思想进行运作芯片输出模块数进行串转换宏观整芯片满足处理速度求相面积复制换速度提高
举例子假设数字信号处理系统输入数流速率350MbsFPGA设计数处理模块处理速度150Mbs处理模块数吞吐量满足求起直接FPGA实现种情况应该利面积换速度思想少复制成3处理模块首先输入数进行串转换然利三模块行处理分配数然处理结果串变换完成数速率求整处理模块两端数速率350MbsFPGA部子模块处理数速率150Mbs实整数吞吐量保障赖3子模块行处理完成说利占更芯片面积实现高速处理通面积复制换取处理速度提高思想实现设计
FPGA英文Field Programmable Gate Array缩写现场编程门阵列PALGALEPLD等编程器件基础进步发展产物作专集成电路ASIC领域中种半定制电路出现解决定制电路足克服原编程器件门电路数限缺点
FPGA采逻辑单元阵列LCA（Logic Cell Array）样新概念部包括配置逻辑模块CLB（Configurable Logic Block）输出输入模块IOB（Input Output Block）部连线（Interconnect）三部分FPGA基特点：
（1）采FPGA设计ASIC电路户需投片生产合芯片
（2）FPGA做全定制半定制ASIC电路中试样片
（3）FPGA部丰富触发器IO引脚
（4）FPGAASIC电路中设计周期短开发费低风险器件
（5）FPGA采高速CHMOS工艺功耗低CMOSTTL电兼容
说FPGA芯片批量系统提高系统集成度性佳选择
目前FPGA品种XILINXXC系列TI公司TPC系列ALTERA公司FIEX系列等
FPGA存放片RAM中程序设置工作状态工作时需片RAM进行编程户根配置模式采编程方式
加电时FPGA芯片EPROM中数读入片编程RAM中配置完成FPGA进入工作状态掉电FPGA恢复成白片部逻辑关系消失FPGA够反复FPGA编程须专FPGA编程器须通EPROMPROM编程器需修改FPGA功时需换片EPROM样片FPGA编程数产生电路功FPGA非常灵活
FPGA种配置模式行模式片FPGA加片EPROM方式模式支持片PROM编程片FPGA串行模式采串行PROM编程FPGA外设模式FPGA作微处理器外设微处理器编程
Verilog HDL种硬件描述语言算法级门级开关级种抽象设计层次数字系统建模建模数字系统象复杂性介简单门完整电子数字系统间数字系统够层次描述相描述中显式进行时序建模
Verilog HDL 语言具述描述力设计行特性设计数流特性设计结构组成包含响应监控设计验证方面时延波形产生机制种建模语言外Verilog HDL语言提供编程语言接口通该接口模拟验证期间设计外部访问设计包括模拟具体控制运行
Verilog HDL语言仅定义语法语法结构定义清晰模拟仿真语义种语言编写模型够Verilog仿真器进行验证语言C编程语言中继承种操作符结构Verilog HDL提供扩展建模力中许扩展初难理解Verilog HDL语言核心子集非常易学数建模应说已足够然完整硬件描述语言足复杂芯片完整电子系统进行描述
历史
Verilog HDL语言初1983年Gateway Design Automation公司模拟器产品开发硬件建模语言时种专语言模拟仿真器产品广泛Verilog HDL 作种便实语言逐渐众设计者接受次努力增加语言普性活动中Verilog HDL语言1990年推公众领域 Open Verilog International （OVI）促进Verilog发展国际性组织1992年OVI决定致力推广Verilog OVI标准成IEEE标准努力获成功Verilog 语言1995年成IEEE标准称IEEE Std 1364 —1995完整标准Verilog硬件描述语言参考手册中详细描述
力
面列出Verilog硬件描述语言力基逻辑门例andornand等置语言中
* 户定义原语UDP创建灵活性户定义原语组合逻辑原语时序逻辑原语
* 开关级基结构模型例pmos nmos等置语言中
* 提供显式语言结构指定设计中端口端口时延路径时延设计时序检查
* 采三种方式混合方式设计建模方式包括行描述方式—程化结构建模—数流方式—连续赋值语句方式建模—结构化方式—门模块实例语句描述建模
* Verilog HDL中两类数类型线网数类型寄存器数类型线网类型表示构件间物理连线寄存器类型表示抽象数存储元件
* 够描述层次设计模块实例结构描述层次
* 设计规模意语言设计规模（）施加限制
* Verilog HDL某公司专语言IEEE标准
* 机器阅读Verilog 语言作EDA工具设计者间交互语言
* Verilog HDL语言描述力够通编程语言接口（PLI）机制进步扩展PLI允许外部函数访问Verilog 模块信息允许设计者模拟器交互例程集合
* 设计够层次加描述开关级门级寄存器传送级（RTL）算法级包括进程队列级
* 够置开关级原语开关级设计完整建模
* 语言生成模拟激励指定测试验证约束条件例输入值指定
* Verilog HDL 够监控模拟验证执行模拟验证执行程中设计值够监控显示值够期值较匹配情况印报告消息
* 行级描述中Verilog HDL仅够RTL级进行设计描述够体系结构级描述算法级行进行设计描述
* 够门模块实例化语句结构级进行结构描述
* Verilog HDL 混合方式建模力设计中模块均设计层次建模
* Verilog HDL 具置逻辑函数例&（位)|(位)
* 高级编程语言结构例条件语句情况语句循环语句语言中
* 显式发定时进行建模
* 提供强力文件读写力
* 语言特定情况非确定性模拟器模型产生结果例事件队列事件序标准中没定义
5 DSP简介
天DSP广泛应现代技术中已许产品关键部分日常生活中扮演着越越重角色系西北工业学Aviation微电子研究中心完成数字信号处理器核心NDSP25设计TexasTms320系列指导完成TMS320C25数字信号处理器设计目标通低端设计流NDSP25兼容TMS320C25时间界面指导容
数字信号处理器(Digital Signal Processor)种适合数字信号进行高速实时处理专处理器实时快速实现种数字信号处理算法数字化时代背景DSP已成通信计算机消费类电子产品等领域基础器件 数字信号处理器数字信号处理着密分关系通常说DSP指数字信号处理(Digital Signal Processing )文里指数字信号处理器数字信号处理门包括许学科应领域学科指利计算机专处理设备数字形式信号进行采集变换滤波估值增强压缩识等处理符合求信号形式数字信号处理器处理数字信号器件伴着数字信号处理产生
DSP发展历程致分三阶段：20世纪70年代理先行80年代产品普90年代突飞猛进DSP出现前数字信号处理微处理器(MPU)完成MPU较低处理速度法满足高速实时求直20世纪70年代
提出DSP理算法基础着规模集成电路技术发展1982年世界诞生首枚DSP芯片年第二代基CMOS工艺DSP芯片应运生80年代期第三代DSP芯片问世90年代DSP发展快相继出现第四代第五代DSP器件20年发展DSP产品应已扩学工作生活方面逐渐成电子产品更新换代决定素
参考文献
1Chan DSK Rabiner LR Analysis of Quantization Errors in the Direct Form for Finite Impulse Response Digital Filters IEEE Trans Audio and Electroacoustics 21(4) (1973) 354366
2Avenhaus E On the Design of Digital Filters with Coefficients of Limited Word Length IEEE Trans Acoustics Speech Signal Processing 20 (1972) 206212
3Kodek DM Design of Optimal Finite Wordlength FIR Digital Filters using Integer Programming Techniques IEEE Trans Acoustics Speech and Signal Processing 28(3) (1980) 304308
4Kodek DM Steiglitz K Comparison of Optimal and Local Search Methods for Designing Finite Wordlength FIR digital filters IEEE Trans Circuits and Systems 28(1) (1981) 2832
5Mitchell M An Introduction to Genetic Algorithms Bradford Books MA Cambridge
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文献资料中文题目：数字滤波器设计
文献资料英文题目：digital filter design
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digital filter design
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digital filter design
Abstract：
With the information age and the advent of the digital world digital signal processing has become one of today's most important disciplines and door technology Digital signal processing in communications voice images automatic control radar military aerospace medical and household appliances and many other fields widely applied In the digital signal processing applications the digital filter is important and has been widely applied
Keyword：SCM Proteus C language Digital filter
1 figures Unit on
Analog and digital filters
In signal processing the function of a filter is to remove unwanted parts of the signal such as random noise or to extract useful parts of the signal such as the components lying within a certain frequency range
The following block diagram illustrates the basic idea
There are two main kinds of filter analog and digital They are quite different in their physical makeup and in how they work An analog filter uses analog electronic circuits made up from components such as resistors capacitors and op amps to produce the required filtering effect Such filter circuits are widely used in such applications as noise reduction video signal enhancement graphic equalisers in hifi systems and many other areas There are wellestablished standard techniques for designing an analog filter circuit for a given requirement At all stages the signal being filtered is an electrical voltage or current which is the direct analogue of the physical quantity (eg a sound or video signal or transducer output) involved A digital filter uses a digital processor to perform numerical calculations on sampled values of the signal The processor may be a generalpurpose computer such as a PC or a specialised DSP (Digital Signal Processor) chip The analog input signal must first be sampled and digitised using an ADC (analog to digital converter) The resulting binary numbers representing successive sampled values of the input signal are transferred to the processor which carries out numerical calculations on them These calculations typically involve multiplying the input values by constants and adding the products together If necessary the results of these calculations which now represent sampled values of the filtered signal are output through a DAC (digital to analog converter) to convert the signal back to analog form
Note that in a digital filter the signal is represented by a sequence of numbers rather than a voltage or current
The following diagram shows the basic setup of such a system
Unit refers to the input signals used to filter hardware or software If the filter input output signals are separated they are bound to respond to the impact of the Unit is separated such as digital filters filter definition Digital filter function which was to import sequences X transformation into export operations through a series Y
According to figures filter function 24hour live response characteristics digital filters can be divided into two namely unlimited long live long live the corresponding IIR filter and the limited response to FIR filters IIR filters have the advantage of the digital filter design can use simulation results and simulation filter design of a large number of tables may facilitate simple It is the shortcomings of the nonlinear phase Linear phase if required will use the entire network phasecorrection Image processing and transmission of data collection is required with linear phase filters identity And FIR linear phase digital filter to achieve but an arbitrary margin characteristics Impact from the digital filter response of the units can be divided into two broad categories the impact of the limited response (FIR) filters and unlimited number of shocks to (IIR) digital filters
FIR filters can be strictly linear phase but because the system FIR filter function extremity fixed at the original point it can only use the higher number of bands to achieve their high selectivity for the same filter design indicators FIR filter called band than a few highIIR 510 times the cost is higher Signal delay is also larger But if the same linear phase IIR filters must be networkwide calibration phase the same section also increase the number of filters and network complexity FIR filters can be used to achieve nonDigui way not in a limited precision of a shock and into the homes and quantitative factors of uncertainty arising from the impact of errors than IIR filter small number and FIR filter can be used FFT algorithms the computational speed But unlike IIR filter can filter through the simulation results there is no readymade formula FIR filter must use computeraided design software (such as MATLAB) to calculate So a broader application of FIR filters and IIR filters are not very strict requirements on occasions
Unit from subfunctions can be divided into the following four categories
(1) Lowfilter (LPF)
(2) highfilter (HPF)
(3) beltfilter (BPF)
(4) to prevent filter (BSF)
The following chart dotted line for the ideals of the filter frequency characteristics
2 MATLAB introduced
MATLAB is a matrix laboratory (Matrix Laboratory) is intended In addition to an excellent value calculation capability it also provides professional symbols terms word processing visualization modeling simulation and realtime control functions MATLAB as the world's top mathematical software applications with a strong engineering computing algorithms research engineering drawings applications development data analysis and dynamic simulation and other functions in aerospace mechanical manufacturing and construction fields playing an increasingly important role And the C language function rich the use of flexibility highefficiency goals procedures High language both advantages as well as low level language features Therefore C language is the most widely used programming language Although MATLAB is a complete fully functional programming environment but in some cases data and procedures with the external environment of the world is very necessary and useful Filter design using Matlab could be adjusted with the design requirements and filter characteristics of the parameters visual simple greatly reducing the workload for the filter design optimization
In the electricity system protection and secondary computer control many signal processing and analysis are based on are certain types Yeroskipou and the second harmonics of the system voltage and current signals (especially at D process) are mixed with a variety of complex components the filter has been installed power system during the critical components Current computer protection and the introduction of two digital signal processing software main filter Digital filter design using traditional cumbersome formula the need to change the parameters after recalculation especially in high filters filter design workload Uses MATLAB signal processing boxes can achieve rapid and effective digital filter design and simulatio
MATLAB is the basic unit of data matrix with its directives Biaodashi mathematics engineering commonly used form is very similar it is used to solve a problem than in MATLAB C Fortran and other languages End precision much the same thing The popular MATLAB 53Simulink30 including hundreds of internal function with the main pack and 30 types of tool kits (Toolbox) kits can be divided into functional tool kits and disciplines toolkit MATLAB tool kit used to expand the functional symbols terms visualization simulation modelling word processing and realtime control functions professional disciplines toolkit is a stronger tool kits tool kits control signal processing tool kit tool kits etc belonging to such communications
MATLAB users to open widely welcomed In addition to the internal function all the packages MATLAB tool kits are readable document and the document could be amended modified or users through Yuanchengxu the construction of new procedures to prepare themselves for kits
3 Digital filter design
Digital filter design of the basic requirements
Digital filter design must go through three steps
(1) Identification of indicators In the design of a filter there must be some indicators These indicators should be determined on the basis of the application In many practical applications digital filters are often used to achieve the frequency operation Therefore indicators in the form of general jurisdiction given frequency range and phase response Margins key indicators given in two ways The first is absolute indicators It provides a function to respond to the demands of the general application of FIR filter design The second indicator is the relative indicators Its value in the form of answers to decibels In engineering practice the most popular of such indicators For phase response indicators forms usually in the hope that the system with a linear phase frequency bands human Using linear phase filter design with the following response to the indicators strengths：①it only contains a few algorithms no plural operations②there is delay distortion only a fixed amount of delay ③the filter length N (number of bands for N1) the volume calculation for N2 magnitude
(2) Model approach Once identified indicators can use a previous study of the basic principles and relationships a filter model to be closer to the target system
(3) Achieved the results of the above two filters usually by differential equations system function or pulse response to describe According to this description of hardware or software used to achieve it
4 Introduced FPGA
Programmable logic device is a generic logic can use a variety of chips which is to achieve ASIC ASIC (Application Specific Integrated Circuit) semicustomized device Its emergence and development of electronic systems designers use CAD tools to design their own laboratory in the ASIC device Especially FPGA (Field Programmable Gate Array) generated and development as a microprocessor memory the figures for electronic system design and set a new industry standard (that is based on standard product sales catalogue in the market to buy) Is a digital system for microprocessors memories FPGA or three standard building blocks constitute their integration direction
Digital circuit design using FPGA devices can not only simplify the design process and can reduce the size and cost of the entire system increasing system reliability They do not need to spend the traditional sense a lot of time and effort required to create integrated circuits to avoid the investment risk and become the fastestgrowing industries of electronic devices group Digital circuit design system FPGA devices using the following main advantages
(1) Design flexible
Use FPGA devices may not in the standard series device logic functional limitations And changes in system design and the use of logic in any one stage of the process and only through the use of reprogramming the FPGA device can be completed the system design provides for great flexibility
(2) Increased functional density
Functional density in a given space refers to the number of functional integration logic Programmable logic chip components doors several high a FPGA can replace several films film scores or even hundreds of smallscale digital IC chip illustrated in the film FPGA devices using the chip to use digital systems in small numbers thus reducing the number of chips used to reduce the number of printed size and printed and will ultimately lead to a reduction in the overall size of the system
(3) Improve reliability
Printing plates and reduce the number of chips not only can reduce system size but it greatly enhanced system reliability A higher degree of integration than systems in many lowstandard integration components for the design of the same system with much higher reliability FPGA device used to reduce the number of chips required to achieve the system in the number printed on the cord and joints are reduced the reliability of the system can be mproved
(4) Shortening the design cycle
As FPGA devices and the programmable flexibility use it to design a system for longer than traditional methods greatly shortened FPGA device master degrees high use printed circuit layout wiring simple At the same time success in the prototype design the development of advanced tools a high degree of automation their logic is very simple changes quickly Therefore the use of FPGA devices can significantly shorten the design cycle system and speed up the pace of product into the market improving product competitiveness
(5) Work fast
FPGACPLD devices work fast generally can reach several original Hertz far larger than the DSP device At the same time the use of FPGA devices the system needed to achieve circuit classes and small and thus the pace of work of the entire system will be improved
(6) Increased system performance confidentiality
Many FPGA devices have encryption functions in the system widely used FPGA devices can effectively prevent illegal copying products were others
(7) To reduce costs
FPGA device used to achieve digital system design if only device itself into the price sometimes you would not know it advantages but there are many factors affecting the cost of the system taken together the cost advantages of using FPGA is obvious First the use of FPGA devices designed to facilitate change shorten design cycles reduce development costs for system development Secondly the size and FPGA devices allow automation needs plugins reducing the manufacturing system to lower costs Again the use of FPGA devices can enhance system reliability reduced maintenance workload thereby lowering the cost of maintenance services for the system In short the use of FPGA devices for system design to save costs
FPGA design principles
FPGA design an important guiding principles the balance and size and speed of exchange the principles behind the design of the filter expression of a large number of certification
Here area means a design exertion FPGACPLD logic resources of the FPGA can be used to the typical consumption (FF) and the search table (IUT) to measure more general measure can be used to design logic equivalence occupied by the door is measured pace means stability operations in the chip design can achieve the highest frequency the frequency of the time series design situation and design to meet the clock cycle PADto pad Clock Setup Time Clock Hold Beijing ClocktoOutput Delay and other characteristics of many time series closely related Area (area) and speed (speed) runs through the two targets FPGA design always is the ultimate design quality evaluation criteria On the size and speed of the two basic concepts balance of size and speed and size and speed of swap
One pair of size and speed is the unity of opposites contradictions body Requirements for the design of a design while the smallest highest frequency of operation is unrealistic More scientific goal should be to meet the design requirements of the design time series (includes requirements for the design frequency) premise the smallest chip area occupied Or in the specified area the design time series cushion greater frequency run higher This fully embodies the goals of both size and speed balanced thinking On the size and speed requirements should not be simply interpreted as raising the level and design engineers perfect sexual pursuit and should recognize that they are products and the quality and cost of direct relevance If time series cushion larger design running relatively high frequency that the design Jianzhuangxing stronger more quality assurance system as a whole On the other hand the smaller size of consumption design is meant to achieve in chip unit more functional modules the chip needs fewer the entire system has been significantly reduced cost As a contradiction of the two components the size and speed is not the same status In contrast meet the timetables and work is more important for some frequency when both con
flicts the use of priority guidelines
Area and the exchange rate is an important FPGA design ideas Theoretically if a design time series cushion larger can run much higher than the frequency design requirements then we can through the use of functional modules to reduce the consumption of the entire chip design area which is used for space savings advantages of speed Conversely if the design of a time series demanding less than ordinary methods of design frequency then generally flow through the string and data conversion parallel reproduction of operational module designed to take on the whole string and conversion and operate in the export module to chip in the data and string conversion from the macro point of view the whole chip meets the requirements of processing speed which is equivalent to the area of reproduction rate increase
For example Assuming that the digital signal processing system is 350Mbs input data flow rate and in FPGA design data processing modules for maximum processing speed of150Mbs because the data throughput processing module failed to meet requirements it is impossible to achieve directly in the FPGA Such circumstances they should use areavelocity thinking at least three processing modules from the first data sets will be imported and converted and then use these three modules parallel processing of data distribution then the results and string conversion we have complete data rate requirements We look at both ends of the processing modules data rate is 350Mbs and in view of the internal FPGA each submodule handles the data rate is 150Mbs in fact all the data throughput is dependent on three security modules parallel processing subsidiary completed that is used by more chip area achieve highspeed processing through the area of reproduction for processing speed enhancement and achieved design
FPGA is the English abbreviation Field of Programmable Gate Array for the site programmable gate array which is in Pal Gal Epld programmable device basis to further develop the product It is as ASIC (ASIC) in the field of a semicustomized circuit and the emergence of both a customized solution to the shortage circuit but overcome the original programmable devices doors circuit few limited shortcomings
FPGA logic module array adopted home (Logic Cell Array) a new concept of internal logic modules may include CLB (Configurable Logic Block) export import module IOB (Input Output Block) and internal links (Interconnect) 3 FPGA basic features are
(1) Using FPGA ASIC design ASIC using FPGA circuits the chip can be usedwhile users do not need to vote films production
(2) FPGA do other customized or semicustomized ASIC circuits throughout the Chinese specimen films
(3) FPGA internal capability and rich IO Yinjue
(4) FPGA is the ASIC design cycle the shortest circuit the lowest development costs risks among the smallest device
(5) FPGA using highspeed Chmos crafts low consumption with CMOS TTL lowpower compatible
It can be said that the FPGA chip is for smallscale systems to improve system integration reliability one of the best
Currently FPGA many varieties the Revenue software series TI companies TPC series the fiex ALTERA company series
FPGA is stored in films from the internal RAM procedures for the establishment of the state of its work therefore need to programmed the internal Ram Depending on the different configuration users can use a different programming methods
Plus electricity FPGA EPROM chips will be read into the film programming RAM中 data configuration is completed FPGA into working order Diaodian FPGA resume into white films the internal logic of relations disappear FPGA to repeated use FPGA's programming is dedicated FPGA programming tool using generic EPROM prom programming device can When the need to modify functional FPGA EPROM can only change is Thus with a FPGA different programming data to produce different circuit functions Therefore the use of FPGA very flexible
There are a variety of FPGA model the main model for a parallel FPGA plus a EPROM manner From the model can support a number of films FPGA serial prom programming model could be used serial prom FPGA programming FPGA The external model can be engineered as microprocessors from its programming microprocessors
Verilog HDL is a hardware description language for the algorithm level doors at the level of abstract level to switchlevel digital system design modelling Modelling of the target figure by the complexity of the system can be something simple doors and integrity of electronic digital systems Digital system to the levels described and in the same manner described in Hintime series modelling
Verilog HDL language with the following description of capacity design behaviour characteristics design data flow characteristics composition and structure designed to control and contain the transmission and waveform design a certification mechanism All this with the use of a modelling language In addition Verilog HDL language programming language interface provided by the interface in simulation design certification from the external design of the visit including specific simulation control and operation
Verilog HDL language grammar is not only a definition but the definition of each grammar structure are clear simulation simulation exercises Therefore the use of such language to use Verilog simulation models prepared by a certification From the C programming language the language inherited multiple operating sites and structures Verilog HDL provides modelling capacity expansion many of the initial expansion would be difficult to understand However the core subsets of Verilog HDL language very easy to learn and use which is sufficient for most modelling applications Of course the integrity of the hardware description language is the most complex chips from the integrity of the electronic systems described
History
Verilog HDL language initially in 1983 by Gateway Design Automation companies for product development simulator hardware modelling language Then it is only a dedicated language Since their simulation simulation devices widely used products Verilog HDL as a userfriendly and practical language for many designers gradually accepted In an effort to inc
rease the popularity of the language activities Verilog HDL language in 1990 was a public area Open Verilog International (OVI) is to promote the development of Verilog international organizations 1992 decided to promote OVI OVI standards as IEEE Verilog standards The effort will ultimately succeed a IEEE
1995 Verilog language standard known as IEEE Std 13641995 Integrity standards in Verilog hardware description language reference manual contains a detailed description
Main capacity
Listed below are the main Verilog hardware description language ability
*Basic logic gate and for example or have embedded in the language and nand
* Users of the original definition of the term (UDP) the flexibility Users can be defined in the original language combinations logic original language the original language of logic could also be time series
* Switches class infrastructure models such as the nmos and pmos also be embedded in the language
* Hinlanguage structure designated for the cost of printing the design and trails Shi Shi and design time series checks
* Available three different ways to design or mixed mode modelling These methods include acts described ways use process of structural modelling Data flow approach use of a modelling approach Fuzhi expression Structured way using examples of words to describe modular doors and modelling
* Verilog HDL has two types of data data types and sequence data line network types Line network types that the physical links between components and sequence types that abstract data storage components
* To describe the level design the structure can be used to describe any level module example
* Design size can be arbitrary Language is design size (size) impose any restrictions
* And the machine can read Verilog language it may as EDA tools and languages of the world between the designers
* Verilog HDL language to describe capacity through the use of programming language interface (PLI) mechanism further expansion PLI is to allow external functions of the visit Verilog module information allowing designers and simulator world Licheng assembly
* Design to be described at a number of levels from the switch level doors level register transfer level (RTL) to the algorithm level including the level of process and content
* To use embedded switching level of the original language in class switch design integrity modelling * Same language can be used to generate simulated incentive and certification by the designated testing conditions such as the value of imports of the designated
*Verilog HDL simulation to monitor the implementation of certification the certification process of implementing the simulation can be designed to monitor and demonstrate value These values can be used to compare with the expectations that are not matched in the case of print news reports
* Acts described in the class not only in the RTL level Verilog HDL design description and to describe their level architecture design algorithm level behavioural description
* Examples can use doors and modular structure of language in a class structure described
* Verilog HDL mixed mode modelling capabilities in the design of a different design in each module can level modelling
* Verilog HDL has builtin logic function such as
*Structure of highlevel programming languages such as conditions of expression and the cycle of expression language language can be used
* To it and can display regular modelling * Provide a powerful document literacy
* Language in the specific circumstances of noncertainty that in the simulator different models can produce different results For example describing events in the standard sequence of events is not defined
5 In troduction of DSP
Today DSP is w idely used in the modern techno logy and it has been the key part of many p roducts and p layed more and mo re impo rtant ro le in our daily lifeRecent ly Northw estern Po lytechnica lUniversity Aviation Microelect ronic Center has comp leted the design of digital signal signal p rocesso r co re NDSP25 w h ich is aim ing at TM S320C25 digital signal p rocesso r of Texas Inst rument TM S320 series By using top 2dow n design flow NDSP25 is compat ible w ith inst ruct ion and interface t im ing of TM S320C25
Digital signal processors (DSP) is a fit for realtime digital signal processing for highspeed dedicated processors the main variety used for realtime digital signal processing to achieve rapid algorithms In today's digital age background the DSP has become the communications computer and consumer electronics products and other fields based device
Digital signal processors and digital signal processing is inseparably we usually say DSP can also mean the digital signal processing (Digital Signal Processing) is that in this digital signal processors Lane Digital signal processing is a cover many disciplines applied to many areas and disciplines refers to the use of computers or specialized processing equipment the signals in digital form for the collection conversion recovery valuation enhancement compression identification processing the signals are compliant form Digital signal processors for digital signal processing devices it is accompanied by a digital signal processing to produce DSP development process is broadly divided into three phases the 20th century to the 1970s theory that the 1980s and 1990s for the development of products Before the emergence of the digital signal processing in the DSP can only rely on microprocessors (MPU) to complete However the advantage of lower highspeed realtime processing can not meet the requirements Therefore until the 1970s a talent made based DSP theory and algorithms With LSI technology development in 1982 was the first recipient of the world gave birth to the DSP chip Years later the second generation based on CMOS工艺 DSP chips have emerged The late 1980s the advent of the third generation of DSP chips DSP is the fastestgrowing 1990s there have been four successive fivegeneration and the generation DS
P devices After 20 years of development the application of DSP products has been extended to people's learning work and all aspects of life and gradually become electronics products determinants
REFERENCES
1 Chan DSK Rabiner LR Analysis of Quantization Errors in the Direct Form for Finite Impulse Response Digital Filters IEEE Trans Audio and Electroacoustics 21(4) (1973) 354366
2 Avenhaus E On the Design of Digital Filters with Coefficients of Limited Word Length IEEE Trans Acoustics Speech Signal Processing 20 (1972) 206212
3 Kodek DM Design of Optimal Finite Wordlength FIR Digital Filters using Integer Programming Techniques IEEE Trans Acoustics Speech and Signal Processing 28(3) (1980) 304308
4 Kodek DM Steiglitz K Comparison of Optimal and Local Search Methods for Designing Finite Wordlength FIR digital filters IEEE Trans Circuits and Systems 28(1) (1981) 2832
5 Mitchell M An Introduction to Genetic Algorithms Bradford Books MA Cambridge
中文翻译：
数字滤波器设计
文摘着信息时代数字世界数字信号处理已成门极重学科技术领域数字信号处理通信语音图动控制雷达军事航空航天医疗家电器等众领域广泛应数字信号处理应中数字滤波器十分重已获广泛应
关键字单片机proteusC语言数字滤波
1数字滤波器介绍：
模拟数字滤波器
信号处理滤功排部分信息机噪音提取信号部分部分势定频率范围
方框图说明基思路：
两类型滤 模拟数字完全物理结构工作 类电子电路模拟滤部分组成例电阻电容opamps生产需滤效果种滤器广泛电路减少噪音等方面应提高视频信号图均衡高科技传真系统等众领域完善技术标准设计模拟电路进行滤特定求阶段信号电机电压滤目前直接物理模拟量(例声音视频信号变频器生产)处理数码滤数字进行数值计算处理器信号抽样值处理器通计算机等PC专业发展计划图(数字信号处理器)芯片模拟信号必须先投入取样数码艺术发展局(模拟数字转换器)二元占抽样连续输入信号价值转移处理器进行数字计算计算通常涉方面投入增加产品价值素必计算结果现抽样信号值滤产出通发展援助委员会(类数位转换器)信号转换回模拟形式
数字滤信号系列数字电压逆流
图表显示种制度基格局：
滤波器指输入信号进行滤波硬件软件果滤波器输入输出
离散信号该滤波器击响应必然离散样滤波器定义数字滤波器数字滤波器功输入序列X通定运算变换成输出序列Y
根数字滤波器激响应函数时域特性数字滤波器分两种限长激相应IIR滤波器限长激响应FIR滤波器IIR数字滤波器优点利模拟滤波器设计结果模拟滤波器设计量图表查方便简单缺点相位非线性需线性相位采全通网络进行相位校正图象处理数采集传输求滤波器具线性相位特性FIR数字滤波器实现线性相位具意幅度特性数字滤波器单位击响应分两类：限击响应（FIR）数字滤波器限击响应（IIR）数字滤波器
FIR滤波器严格线性相位然FIR滤波器系统函数极点固定原点较高阶数实现高选择性样滤波器设计指标FIR滤波器求阶数IIR高510倍成较高信号延迟较果求相线性相位IIR滤波器必须加全通网络进行相位校正样增加滤波器网络节数复杂性FIR滤波器非递方法实现限精度会产生振荡时量化舍入系数确定性引起误差影响IIR滤波器FIR滤波器采FFT算法运算速度快象IIR滤波器助模拟滤波器成果FIR滤波器没现成计算公式必须计算机辅助设计软件（MATLAB）计算知FIR滤波器应较广IIR滤波器相位求严格场合
滤波器功分分4类
(1) 低通滤波器(LPF)
(2) 高通滤波器(HPF )
(3) 带通滤波器(BPF )
(4) 带阻滤波器(BSF)
理想滤波器幅频特性图虚线：
2MATLAB介绍
MATLAB矩阵实验室Matrix Laboratory意具备卓越数值计算力外提供专业水符号计算文字处理视化建模仿真实时控制等功MATLAB作世界顶尖数学应软件强工程计算算法研究工程绘图应程序开发数分析动态仿真等功航空航天机械制造工程建筑等领域发挥着越越重作C语言功丰富灵活方便目标程序效率高高级语言优点低级语言特点C语言目前应广
编程语言然MATLAB完整功齐全编程环境某情况外部环境数程序交互非常必须益利MATLAB设计滤波器时设计求滤波器特性调整参数直观简便极减轻工作量利滤波器设计优化
电力系统微机保护二次控制中信号处理分析基正旋基波某整次谐波进行系统电压电流信号尤障瞬变程中混种复杂成分滤波器直电力系统二次装置关键部件目前微机保护二次信号处理软件采数字滤波器传统数字滤波器设计繁琐公式计算改变参数需重新计算设计滤波器尤高阶滤波器时工作量利MATLAB信号处理箱快速效实现数字滤波器设计仿真
MATLAB基数单位矩阵指令表达式数学工程中常形式十分相似MATLAB解算问题CFORTRAN等语言完相事情简捷前流行MATLAB 53Simulink30包括拥数百部函数包三十种工具包(Toolbox)工具包分功性工具包学科工具包功工具包扩充MATLAB符号计算视化建模仿真文字处理实时控制等功学科工具包专业性较强工具包控制工具包信号处理工具包通信工具包等属类
开放性MATLAB广受户欢迎部函数外MATLAB包文件种工具包读修改文件户通源程序修改加入编写程序构造新专工具包
3 数字滤波器设计
数字滤波器设计基求
数字滤波器设计三步骤：
（1） 确定指标设计滤波器前必须指标指标根应确定实际应中数字滤波器常常实现选频操作指标形式般频域中出幅度相位响应幅度指标两种方式出第种绝指标提供幅度响应函数求般应FIR滤波器设计第二种指标相指标分贝值形式出求工程实际中种指标受欢迎相位响应指标形式通常希系统通频带中线性相位运线性相位响应指标进行滤波器设计具优点：①包含实数算法涉复数运算②存延迟失真固定数量延迟③长度N滤波器阶数N1计算量N2数量级
（2） 模型逼旦确定指标利前面学基原理关系式提出滤波器模型逼定指标体系
（3） 实现面两步结果滤波器通常差分方程系统函数脉响应描述根描述硬件者计算机软件实现
4FPGA介绍
编程逻辑器件种构成种途逻辑通芯片实现专集成电路ASICApplication Specific Integrated Circuit半定制器件出现发展电子系统设计师助CAD手段实验室里设计ASIC器件特FPGA （Field Programmable Gate Array） 产生发展成继微处理器存储器电子数字系统设计确定种新工业标准(标准产品目录销售市场购)数字系统正微处理器存储器FPGA三种标准积木块构成集成方发展
FPGA器件设计数字电路仅简化设计程降低整系统体积成增加系统性需花费传统意义制造集成电路需量时间精力避免投资风险成电子器件行业中发展快族FPGA器件设计数字系统电路优点：
（1）设计灵活
FPGA器件受标准系列器件逻辑功限制修改逻辑系统设计程阶段中进行须通FPGA器件进行重新编程完成系统设计提供灵活性
（2） 增功密集度
功密集度指定空间集成逻辑功数量编程逻辑芯片组件门数高片FPGA代片十片百片中规模数字集成电路芯片FPGA器件实现数字系统时芯片数量少减少芯片数目减少印刷线路板面积印刷线路板数目终导致系统规模全面缩减
（3）提高性
减少芯片印刷板数目仅缩系统规模极提高系统性 具较高集成度系统许低集成度标准组件设计相系统具高性FPGA器件减少实现系统需芯片数目印刷线路板引线焊点数量减少系统性提高
（4）缩短设计周期
FPGA器件编程性灵活性设计系统需时间传统方法缩短FPGA器件集成度高时印刷线路板电路布局布线简单时样机设计成功开发工具先进动化程度高进行逻辑修改十分简便迅速FPGA器件缩短系统设计周期加快产品投放市场速度提高产品竞争力
（5） 工作速度快
FPGACPLD器件工作速度快般达百兆赫兹远远DSP器件时FPGA器件实现系统需电路级数少整系统工作速度会提高
（6） 增加系统保密性
FPGA器件具加密功系统中广泛FPGA器件效防止产品非法仿制
（7）降低成
FPGA器件实现数字系统设计时果仅器件身价格考虑时出优势影响系统成素方面综合考虑FPGA成优越性明显首先FPGA器件修改设计方便设计周期缩短系统研制开发费降低次FPGA器件印刷线路板面积需插件减少系统制造费降低次FPGA器件系统性提高维修工作量减少进系统维修服务费降低总FPGA器件进行系统设计节约成
FPGA设计原：
FPGA设计重指导原：面积速度衡互换原边滤波器设计中量验证体现
里面积指设计消耗FPGACPLD逻辑资源数量FPGA消耗触发器(FF)查找表(IUT)衡量更般衡量方式设计占等价逻辑门数衡量速度指设计芯片稳定运行够达高频率频率设计时序状况决定设计满足时钟周期PADto PAD Time Clock Setup Time Clock Hold Time ClocktoOutput Delay等众时序特征量密切相关面积(area)速度(speed)两指标贯穿着FPGA设计始终设计质量评价终极标准关面积速度两基概念
面积速度衡面积速度互换
面积速度立统矛盾体求设计时具备设计面积运行频率高现实更科学设计目标应该满足设计时序求(包含设计频率求)前提占芯片面积者规定面积设计时序余量更频率跑更高两种目标充分体现面积速度衡思想关面积速度求应该简单理解工程师水提高设计完美性追求应该认识产品质量成直接相关果设计时序余量较跑频率较高意味着设计健壮性更强整系统质量更保证方面设计消耗面积更意味着单位芯片实现功模块更需芯片数量更少整系统成幅度削减作矛盾两组成部分面积速度位样相满足时序工作频率求更重两者突时采速度优先准
面积速度互换 FPGA设计重思想理讲设计果时序余量较跑频率远远高设计求通功模块复减少整设计消耗芯片面积速度优势换面积节约反果设计时序求高普通方法达设计频率般通数流串转换行复制操作模块整设计采取串转换思想进行运作芯片输出模块数进行串转换宏观整芯片满足处理速度求相面积复制换速度提高
举例子假设数字信号处理系统输入数流速率350MbsFPGA设计数处理模块处理速度150Mbs处理模块数吞吐量满足求起直接FPGA实现种情况应该利面积换速度思想少复制成3处理模块首先输入数进行串转换然利三模块行处理分配数然处理结果串变换完成数速率求整处理模块两端数速率350MbsFPGA部子模块处理数速率150Mbs实整数吞吐量保障赖3子模块行处理完成说利占更芯片面积实现高速处理通面积复制换取处理速度提高思想实现设计
FPGA英文Field Programmable Gate Array缩写现场编程门阵列PALGALEPLD等编程器件基础进步发展产物作专集成电路ASIC领域中种半定制电路出现解决定制电路足克服原编程器件门电路数限缺点
FPGA采逻辑单元阵列LCA（Logic Cell Array）样新概念部包括配置逻辑模块CLB（Configurable Logic Block）输出输入模块IOB（Input Output Block）部连线（Interconnect）三部分FPGA基特点：
（1）采FPGA设计ASIC电路户需投片生产合芯片
（2）FPGA做全定制半定制ASIC电路中试样片
（3）FPGA部丰富触发器IO引脚
（4）FPGAASIC电路中设计周期短开发费低风险器件
（5）FPGA采高速CHMOS工艺功耗低CMOSTTL电兼容
说FPGA芯片批量系统提高系统集成度性佳选择
目前FPGA品种XILINXXC系列TI公司TPC系列ALTERA公司FIEX系列等
FPGA存放片RAM中程序设置工作状态工作时需片RAM进行编程户根配置模式采编程方式
加电时FPGA芯片EPROM中数读入片编程RAM中配置完成FPGA进入工作状态掉电FPGA恢复成白片部逻辑关系消失FPGA够反复FPGA编程须专FPGA编程器须通EPROMPROM编程器需修改FPGA功时需换片EPROM样片FPGA编程数产生电路功FPGA非常灵活
FPGA种配置模式行模式片FPGA加片EPROM方式模式支持片PROM编程片FPGA串行模式采串行PROM编程FPGA外设模式FPGA作微处理器外设微处理器编程
Verilog HDL种硬件描述语言算法级门级开关级种抽象设计层次数字系统建模建模数字系统象复杂性介简单门完整电子数字系统间数字系统够层次描述相描述中显式进行时序建模
Verilog HDL 语言具述描述力设计行特性设计数流特性设计结构组成包含响应监控设计验证方面时延波形产生机制种建模语言外Verilog HDL语言提供编程语言接口通该接口模拟验证期间设计外部访问设计包括模拟具体控制运行
Verilog HDL语言仅定义语法语法结构定义清晰模拟仿真语义种语言编写模型够Verilog仿真器进行验证语言C编程语言中继承种操作符结构Verilog HDL提供扩展建模力中许扩展初难理解Verilog HDL语言核心子集非常易学数建模应说已足够然完整硬件描述语言足复杂芯片完整电子系统进行描述
历史
Verilog HDL语言初1983年Gateway Design Automation公司模拟器产品开发硬件建模语言时种专语言模拟仿真器产品广泛Verilog HDL 作种便实语言逐渐众设计者接受次努力增加语言普性活动中Verilog HDL语言1990年推公众领域 Open Verilog International （OVI）促进Verilog发展国际性组织1992年OVI决定致力推广Verilog OVI标准成IEEE标准努力获成功Verilog 语言1995年成IEEE标准称IEEE Std 1364 —1995完整标准Verilog硬件描述语言参考手册中详细描述
力
面列出Verilog硬件描述语言力基逻辑门例andornand等置语言中
* 户定义原语UDP创建灵活性户定义原语组合逻辑原语时序逻辑原语
* 开关级基结构模型例pmos nmos等置语言中
* 提供显式语言结构指定设计中端口端口时延路径时延设计时序检查
* 采三种方式混合方式设计建模方式包括行描述方式—程化结构建模—数流方式—连续赋值语句方式建模—结构化方式—门模块实例语句描述建模
* Verilog HDL中两类数类型线网数类型寄存器数类型线网类型表示构件间物理连线寄存器类型表示抽象数存储元件
* 够描述层次设计模块实例结构描述层次
* 设计规模意语言设计规模（）施加限制
* Verilog HDL某公司专语言IEEE标准
* 机器阅读Verilog 语言作EDA工具设计者间交互语言
* Verilog HDL语言描述力够通编程语言接口（PLI）机制进步扩展PLI允许外部函数访问Verilog 模块信息允许设计者模拟器交互例程集合
* 设计够层次加描述开关级门级寄存器传送级（RTL）算法级包括进程队列级
* 够置开关级原语开关级设计完整建模
* 语言生成模拟激励指定测试验证约束条件例输入值指定
* Verilog HDL 够监控模拟验证执行模拟验证执行程中设计值够监控显示值够期值较匹配情况印报告消息
* 行级描述中Verilog HDL仅够RTL级进行设计描述够体系结构级描述算法级行进行设计描述
* 够门模块实例化语句结构级进行结构描述
* Verilog HDL 混合方式建模力设计中模块均设计层次建模
* Verilog HDL 具置逻辑函数例&（位)|(位)
* 高级编程语言结构例条件语句情况语句循环语句语言中
* 显式发定时进行建模
* 提供强力文件读写力
* 语言特定情况非确定性模拟器模型产生结果例事件队列事件序标准中没定义
5 DSP简介
天DSP广泛应现代技术中已许产品关键部分日常生活中扮演着越越重角色系西北工业学Aviation微电子研究中心完成数字信号处理器核心NDSP25设计TexasTms320系列指导完成TMS320C25数字信号处理器设计目标通低端设计流NDSP25兼容TMS320C25时间界面指导容
数字信号处理器(Digital Signal Processor)种适合数字信号进行高速实时处理专处理器实时快速实现种数字信号处理算法数字化时代背景DSP已成通信计算机消费类电子产品等领域基础器件 数字信号处理器数字信号处理着密分关系通常说DSP指数字信号处理(Digital Signal Processing )文里指数字信号处理器数字信号处理门包括许学科应领域学科指利计算机专处理设备数字形式信号进行采集变换滤波估值增强压缩识等处理符合求信号形式数字信号处理器处理数字信号器件伴着数字信号处理产生
DSP发展历程致分三阶段：20世纪70年代理先行80年代产品普90年代突飞猛进DSP出现前数字信号处理微处理器(MPU)完成MPU较低处理速度法满足高速实时求直20世纪70年代
提出DSP理算法基础着规模集成电路技术发展1982年世界诞生首枚DSP芯片年第二代基CMOS工艺DSP芯片应运生80年代期第三代DSP芯片问世90年代DSP发展快相继出现第四代第五代DSP器件20年发展DSP产品应已扩学工作生活方面逐渐成电子产品更新换代决定素
参考文献
1Chan DSK Rabiner LR Analysis of Quantization Errors in the Direct Form for Finite Impulse Response Digital Filters IEEE Trans Audio and Electroacoustics 21(4) (1973) 354366
2Avenhaus E On the Design of Digital Filters with Coefficients of Limited Word Length IEEE Trans Acoustics Speech Signal Processing 20 (1972) 206212
3Kodek DM Design of Optimal Finite Wordlength FIR Digital Filters using Integer Programming Techniques IEEE Trans Acoustics Speech and Signal Processing 28(3) (1980) 304308
4Kodek DM Steiglitz K Comparison of Optimal and Local Search Methods for Designing Finite Wordlength FIR digital filters IEEE Trans Circuits and Systems 28(1) (1981) 2832
5Mitchell M An Introduction to Genetic Algorithms Bradford Books MA Cambridge
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